Performance Enhancement and Characterization of Junctionless VeSFET
نویسندگان
چکیده
The design of double gate n-channel transistor named as junctionless vertical slit field effect transistor (JL VeSFET) is demonstrated in this paper. JLVeSFET is novel twin gate device which turns on and off depending upon the extension of depletion region from two gates inside the channel. It is observed that it offers very low OFF current with ideal subthreshold slope. JLVeSFET is compared with bulk MOSFETs at 65nm technology node. Characteristics of JLVeSFET with high-k dielectric are demonstrated through simulations in this paper. The device shows optimized performance with OFF current (~10 -18 A/μm), high Ion/Ioff (~10 12 ) and subthreshold slope of ~65mV/decade for a 50nm radius of simulated JLVeSFET
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